This invention relates to a process for forming double-well, self-aligned regions in semiconductor substrates. In particular, the present invention relates to a one-photolithographic-mask process for forming close-packed self-aligned wells which are particularly useful in CMOS integrated circuits. In addition to the use of only a single photolithographic mask, the process is characterized in that a relatively simple lift-off technique is used to remove the single photolithographic mask to thereby form a doping mask for the second well which is the complement of the photolithographic mask. The process is further simplified by the use of preferential oxide etching as an adjunct to the lift-off.
Single wells or tubs (either n-type or p-type) are formed in opposite conductivity-type bulk semiconductor substrates or epitaxial layers (p-type or n-type), to provide the required opposite conductivity-type substrate surface-adjacent regions for the p-channel and n-channel transistors which are used in CMOS technology. The advantages to CMOS IC of using multiple-well structures are well-known. These include the control of substrate conductivity and of doping levels, and the potential for accurate dimensional control and decreased device size and the resulting increase packing density and speed. These and other advantages are discussed, for example, in Chen, QUADRUPLE-WELL FOR VLSI TECHNOLOGY, IEEE Transactions on Electron Devices, Vol. ED-31, No. 7, July 1984, pp 910-919. Accordingly, the advantages need not be discussed at length here. It is sufficient to note that among the issues which are of paramount importance at present are the need to decrease the latch-up phenomenon and the need to increase the relatively low CMOS packing density (relative to NMOS technology). Packing density would be increased by decreasing the large lay-out space which is required to form the opposite conductivity regions for the n-channel and p-channel transistors.
Chen, U.S. Pat. No. 4,411,058, issued Oct. 25, 1983 describes a process for forming self-aligned CMOS well structures. Chen forms a double retrograde, quadruple-well CMOS structure. Essentially, the structure is a two-well structure in which deep n-type and p-type wells are separated by shallow n-type and p-type wells which form channel stops. The shallow wells are implanted through a peripheral field oxide during the deep well implantation. Overall, the Chen process involves forming deep-well windows in a planar field oxide; defining a photoresist mask covering the p-well region and implanting phosphorous in the presence of the mask to define the deep n-well and the adjacent shallow n-well under the oxide; depositing aluminum on the existing structure; and lifting off the aluminum and the underlying masking material from over the p-well region, to define the remaining aluminum as a dopant mask for the implantation of the deep and shallow p-type wells. The resulting boundaries of the deep and shallow wells are self-aligned at the edge of the field oxide. In addition, the two shallow wells are mutually self-aligned by the aluminum mask.
According to Chen '058 patent, photoresist alone does not give the requisite lift-off to the overlying metal. Thus, a composite mushroom-shaped mask must be used. This, however, introduces process and structural complexities. In one embodiment, the composite mask comprises two layers of photoresist. The upper layer of photoresist is formed with a lip by over-etching the bottom layer.
In an alternative, preferred embodiment, the bottom mask layer is polysilicon. Again, this lower layer is over-etched to form the protruding over-layer of photoresist which is necessary for proper lift-off of the metal. In addition, the poly is not dissolved by the lift-off and requires a separate etch and the use of an underlying oxide etch-stop layer.
The above referenced Chen article, which was published after the development of the present invention, also describes a process for forming a quadruple-well CMOS structure comprising deep n-type and p-type wells and intervening, shallow well channel stops. The Chen article references the aluminum lift-off step which uses a "mushroom type" resist. Although the focus of the Chen article is directed to the operating characteristics of the resulting circuit (details of the lift-off process are not included), it is quite apparent that the Chen article references the same process as the Chen '058 patent and is affected by the same structural and process complexity.
It is an object of the present invention to provide a single-mask double-well fabrication process which is also characterized by process simplicity.
It is another object of the present invention to provide a double-well fabrication process which permits precise dimensional and doping level control of the wells.